We are experts in high performance configurable computing.
We build RF front end to support communication up to 100 GHz RF bands and we are developing a single platform that leverages Machine Learning to integrate COMMS, SIGINT and EW.
We take multi giga-samples I/Q and preform all the processing in FPGAs to provide fast turn around solutions.
We are leveraging Machine Learning to develop next generation algorithms for phase arrays, beam forming algorithms, guidance and navigation, to develop next generation of directional networking.
is the current PI on AuresTech’ s FutureG LPx/AJ research. He oversees several projects in the areas of system architectures analysis, modeling and design of communication systems sponsored by ONR, AFRL and other major aerospace companies. His research centers on the development of a low SWaP and cost SoC that includes both RF and BB to p
is the current PI on AuresTech’ s FutureG LPx/AJ research. He oversees several projects in the areas of system architectures analysis, modeling and design of communication systems sponsored by ONR, AFRL and other major aerospace companies. His research centers on the development of a low SWaP and cost SoC that includes both RF and BB to provide a common platform for COMMs, SIGINT and RADAR applications. Prior to founding AuresTech Inc., Mr. Chibane worked at MIT-Lincoln Lab, where he led research in the Multi-Band Test Terminal (MBTT) and Protected Anti-Jam Tactical SATCOM (PATS) at MIT. He also led the development of novel optimized cross layer processing waveforms to improve data latency and PHY implementation. During his tenure at Draper Lab, he led DARPA’s HOTSPOT program to develop a gigabit data link operating at 80 GHz to connect small UAV that serve as backbone to a ground soldiers and robots. This work resulted in the development of fast acquisition and tracking, guidance, and navigation algorithms to optimize antenna alignments to maintain the RF link with very narrow pencil beam width. Cherif is the chair of the NJ IEEE Aerospace Chapter.
Senior Scientist on he has forty years of experience in the design, implementation and test of communication and control systems, as an individual contributor and project leader. Areas of experience include: (1) Wireless Communications – digital signal processing, receiver architecture, physical layer and waveform development, RF chain m
Senior Scientist on he has forty years of experience in the design, implementation and test of communication and control systems, as an individual contributor and project leader. Areas of experience include: (1) Wireless Communications – digital signal processing, receiver architecture, physical layer and waveform development, RF chain modeling and dynamic simulation, (2) Guidance, Navigation & Control – sensor fusion, inertial sensor design, dynamic modeling, Kalman filtering, parameter & nonlinear estimation, autopilot and landing system design, rigid body dynamics, precision pointing, line-of-sight inertial stabilization, comm-on-the-move, position-nav-timing and (3) model-based development of embedded software and firmware – auto-generation of VHDL & C. Dave is a registered Professional Engineer in the state of New Jersey, a senior member of IEEE, past Chairman of the Control Systems Section in IEEE’s North Jersey Chapter, and an Adjunct Professor at NJIT. He is the recipient of several awards including a Bell Labs Gold Award, a BAE Gold Award, and for 8 consecutive years BAE’s Bronze Chairman’s Award. He holds 12 patents and has 26 technical publications.
is currently a senior scientist on AuresTech’s FutureG LPx/AJ program. He is a prolific and efficient inventor presently holding approximately 100 US patents. He can readily switch from a theoretical context to a practical one while maintaining a clear connection between the two. In parallel with actual technology development in the labo
is currently a senior scientist on AuresTech’s FutureG LPx/AJ program. He is a prolific and efficient inventor presently holding approximately 100 US patents. He can readily switch from a theoretical context to a practical one while maintaining a clear connection between the two. In parallel with actual technology development in the laboratory, Dr. Lomp has been extensively involved in intellectual property (IP) development and the delivery of value derived from patented technology through licensing and embedding of IP in working, concrete deliverables such as chip sets and associated software. His patents have led to revenues totaling over two billion dollars. Gary has been a lead in the development of advanced waveforms for the JTRS as well as 3G and 4G.
Consultant Sr. Scientist. received the Ph.D. degree in electrical and computer engineering from the University of Connecticut, in 2015. She is currently an Associate Professor and the ECE Graduate Program Director of the Electrical and Biomedical Engineering Department, Fairfield University, Connecticut. Her research interests include w
Consultant Sr. Scientist. received the Ph.D. degree in electrical and computer engineering from the University of Connecticut, in 2015. She is currently an Associate Professor and the ECE Graduate Program Director of the Electrical and Biomedical Engineering Department, Fairfield University, Connecticut. Her research interests include wide breadth of estimation theory, with a specific emphasis on practical applications, such as drone navigation and target tracking. Her scholarly contributions extend to space-based infrared (IR)/electro-optical (EO) sensors, signal and image processing, machine learning, and big data. Alongside her research, she is committed to enhancing engineering education and boosting the representation of women and underrepresented groups within the engineering sector.
is an experienced embedded software engineer. He has over 15 years of experience architecting, designing,
implementing, and testing embedded software, with a core focus on embedded Linux and developing systems to interact with FPGAs. This includes custom board bring-up, writing custom device drivers,
and writing application code. Mohammed h
is an experienced embedded software engineer. He has over 15 years of experience architecting, designing,
implementing, and testing embedded software, with a core focus on embedded Linux and developing systems to interact with FPGAs. This includes custom board bring-up, writing custom device drivers,
and writing application code. Mohammed has extensive experience across multiple verticals, including defense, automotive, and medical devices. Mohammed also served as an Adjunct Professor at The Cooper Union for the Advancement of Science and Art, where he received his Master's and Bachelor's in Electrical
Engineering.
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